1. Field of the Invention
The invention relates to a digital-to-analog converting circuit, and more particularly to a digital-to-analog converting circuit with an analogue buffer and a capacitor type digital-to-analog converter.
2. Description of the Related Art
In image displaying systems, such as thin film transistor liquid crystal displays (TFT-LCD) fabricated by low temperature poly-Si (LTPS) technology, the bit number of a digital signal is increased due to higher resolution and gray scale. However, for application of the digital signal with higher bits, using a resistor type digital-to-analog converting circuit will greatly expand the circuit layout area. Therefore, one solution is to use the resistor type digital-to-analog converting circuit together with a capacitor type digital-to-analog converting circuit. For example, a 10-bit resistor type digital-to-analog converting circuit is re-designed to a 5-bit resistor type digital-to-analog converting circuit with a 5-bit capacitor type digital-to-analog converting circuit, or a 3-bit resistor type digital-to-analog converting circuit with a 7-bit capacitor type digital-to-analog converting circuit, thus reducing layout area.
FIG. 1 shows a conventional capacitor type digital-to-analog converting circuit 100 with an analogue buffer. The digital-to-analog converting circuit 100 comprises a capacitor type digital-to-analog converter 110 and a source follow type analogue buffer 120. The source follow type analogue buffer 120 has an active load 122 and a storage capacitor 124, which is used to compensate for an output voltage. The source follow type analogue buffer 120 can decrease the charge time and variations caused by device characteristics, and increase the input voltage range. However, during a compensation period of the source follow type analogue buffer 120, a capacitor 112, which is an equivalent capacitor of all the capacitors within the capacitor type digital-to-analog converter 110, is coupled to the storage capacitor 124. Due to the coupling, the capacitor 112 influences the voltage distribution within the storage capacitor 124, such that an incorrect voltage is stored in the storage capacitor 124, thus causing distortion of the output voltage.